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Maintenance Object Repair Procedures
555-233-123 10-1806 Issue 4 May 2002
For a system with a TN768, TN780 or TN2182 Tone-Clock Circuit Pack:
Notes:
a. Refer to XXX-BD (Common Port Circuit Pack) Maintenance documentation
for descriptions of these tests.
b. Refer to TONE-BD (Tone-Clock Circuit Pack) section for descriptions of
these tests.
c. Refer to TDM-CLK (TDM Bus Clock) section for descriptions of these tests.
d. This test only runs on the Standby Tone-Clock circuit pack in a Port
Network with more than one Tone-Clock circuit pack (High or Critical
Reliability Option). The circuit pack must be a TN780 code with firmware
revision 2 or above, or a TN2182.
Order of Investigation
Short Test
Sequence
Long Test
Sequence D/
ND
1
1 D = Destructive; ND = Nondestructive
SAKI Reset Test (#53) (a) X D
Clock Health Test (#46) (b) X X ND
Control Channel Loop Around Test (#52) (a) X X ND
Tone Generator Crosstalk Test (#90) X ND
Tone Generator Transmission Test (#40) X X ND
Tone Generator Audit/Update Test (#41) X X ND
TDM Bus Clock Circuit Status Inquiry Test (#148) (c) X X ND
TDM Bus Clock Slip Inquiry Test (#149)(e)(c) X X ND
TDM Bus Clock PPM Inquiry Test (#150) (c) X X ND
TDM Bus Clock Parameter Update Test (#151) (c) X X
Board Type Check Test (#574) (c) X X
Standby Reference Health Check Test (#651) (c,d) X