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TONE-BD (Tone-Clock Circuit Pack)
Issue 4 May 2002
10-1783
555-233-123
TONE-BD (Tone-Clock Circuit Pack)
The Tone-Clock circuit pack functionality is provided by two independent objects
in the same circuit pack. The tone generator provides all the tones needed by the
system and the clock generates the system clocks for the Time Division Multiplex
(TDM) Bus and aids in monitoring and selecting internal synchronization
references.
When resolving errors/alarms on the Tone-Clock circuit pack, the following should
be used also:
■
Use the set tone-clock PC command to establish the tone and
synchronization resources for the system.
■
TONE-PT (Tone Generator) Maintenance documentation.
■
TDM-CLK (TDM Bus Clock) Maintenance documentation.
■
SYNC (Synchronization) Maintenance documentation.
The TN2182 is a combined Tone-Clock-Detector circuit pack which contains a
third independent function not available on the TN768 or TN780. The TN2182
contains 8 ports used for all-purpose tone detection. These ports are called
Enhanced Tone Receiver ports (ETR-PT) and are described in the documentation
for ETR-PT.
Tone-Clock Circuit Packs and System Reliability
Options
The following sections describe the relationship between the various System
Reliability Options and Tone-Clock circuit pack configurations.
Standard Reliability Option
Systems with the Standard Reliability Option (no duplication options) have one
Tone-Clock circuit pack in each port network (PPN and EPN). For the PPN or the
EPN this is in the A carrier. This Tone-Clock circuit pack generates clocks and
provides system tones for all carriers of the port network it resides on.
MO Name (in
Alarm Log)
Alarm Level
Initial Command to
Run
1
1
P is the port network number (1 for PPN, 2-3 for EPNs). C is the carrier designation (A,
B, C, D, or E).
Full Name of MO
MAJOR
test tone-clock PC
Tone-Clock Circuit Pack
TONE-BD
MINOR
test tone-clock PC
Tone-Clock Circuit Pack
TONE-BD
WARNING
release tone-clock PC
Tone-Clock Circuit Pack
Содержание Definity SI
Страница 1: ...0DLQWHQDQFH IRU YD D 1 7 6HUYHU 6 Volumes 1 2 and 3 555 233 123 Issue 4 May 2002...
Страница 62: ...Maintenance Architecture 555 233 123 1 26 Issue 4 May 2002...
Страница 92: ...Management Terminals 555 233 123 3 26 Issue 4 May 2002...
Страница 204: ...Routine Maintenance Procedures 555 233 123 5 100 Issue 4 May 2002...
Страница 250: ...LED Interpretation 555 233 123 7 10 Issue 4 May 2002...
Страница 2763: ...VC DSPPT Issue 4 May 2002 10 1977 555 233 123 Figure 10 107 VC Circuit Pack DSP Port Local TDM Loopback Test...
Страница 2776: ...Maintenance Object Repair Procedures 555 233 123 10 1990 Issue 4 May 2002 Figure 10 109 VC Circuit Pack Summer Port Loopback Test...
Страница 2804: ...Maintenance Object Repair Procedures 555 233 123 10 2018 Issue 4 May 2002...
Страница 2968: ...Index 555 233 123 IN 10 Issue 4 May 2002...