Avaya Definity SI, Руководство по обслуживанию, Страница: 2382 / 2968

Maintenance Object Repair Procedures
555-233-123 10-1596 Issue 4 May 2002
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If the system synchronization reference is a DS1 interface
circuit pack and the master Tone-Clock circuit pack fails TDM
Bus Clock Test #150, the primary or secondary (if
administered) synchronization references are not providing
valid timing signals for the system. Check the system
synchronization references administered, and follow the
steps outlined in note (a) if the primary synchronization
reference is providing timing for the system or note (c) if the
secondary synchronization reference is providing timing for
the system.
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If the slave Tone-Clock circuit pack fails the TDM Bus Clock
Test #150 but the master Tone-Clock does not fail this test,
the master Tone-Clock circuit pack must be replaced. Follow
the Tone-Clock replacement steps listed in the “TDM-CLK”.
If SLIP errors remain follow SLIP ANALYSIS.
5. Standard system:—Error 2305:
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Replace the Expansion Interface circuit pack in this port
network and the Expansion Interface circuit pack in the PPN
that is connected to this port network.
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If the problem persists, replace the Tone-Clock circuit pack in
the slave port network. Follow the steps listed in “TDM-CLK”
to replace the Tone-Clock circuit pack.
i. Noise on the DS1 line can cause transient alarms on synchronization.
Therefore, when a synchronization problem occurs causing error types 1,
257, or 513, a WARNING alarm is first raised for 15 to 20 minutes before
the alarm is upgraded to a MAJOR or MINOR alarm.
System Technician-Demanded Tests: Descriptions
and Error Codes
Always investigate tests in the order presented in the table below. By clearing
error codes associated with the Test Synchronization Test, for example, you may
also clear errors generated from other tests in the testing sequence.
Order of Investigation
Short Test
Sequence Long Test
Sequence
D/ND
1
1 D = Destructive; ND = Nondestructive
Test Synchronization Test (#417) X X ND