NXP Semiconductors MPC5644A, Reference Manual, Page: 1732 / 1735

Revision history
MPC5644A Microcontroller Reference Manual, Rev. 6
1732 Freescale Semiconductor
System Integration Unit • Table 16-170 (SIU_PCR215 PA values) changed the “I/O” value from “I/O” to
“O”
• Table 16-216 (SIU_ECCR field description) bit “ENGDICV” changed the
equation from
to
• Updated Table 16-198 (SIU_PCR350 – SIU_PCR381 DSPI muxing) as
follows:
—Removed column “DSPI deserialize destination”.
—Updated column “PA value” by changing
“0b01” to “0b001”
“0b11” to “0b100”
“0b10” to “0b010”
“0b00” to “0b000”.
• Updated Table 16-199 (SIU_PCR382 – SIU_PCR389 DSPI muxing) as
follows:
—Removed column “DSPI deserialize destination”.
—Updated column “PA value” by changing
“0b011” to “0b100”
• Updated Table 16-200 (SIU_PCR390 – SIU_PCR413 DSPI muxing) as
follows:
—Removed column “DSPI deserialize destination”.
—Updated column “PA value” by changing
“0b01” to “0b001”
“0b11” to “0b100”
“0b10” to “0b010”
“0b00” to “0b000”.
• Change done in Section 16.6.24, IMUX Select Register 10 (SIU_ISEL10) is
as follows:.
Change from: The IMUX Select Register 10 (SIU_ISEL10 or SIU_DECFIL1)
register contains bit fields that specifywhich eTPU output is used to trigger the
decimation filter result output buffer for decimation filters A andB.
Change to: The IMUX Select Register 10 (SIU_ISEL10 or SIU_DECFIL1)
register contains bit fields that specify which eTPU output is connected to the
decimation filter Integrator halt signal (HSELx) and Integrator reset signal
(ZSELx).For more details refer to
Section 26.3.3, Integrator halt signal and
Section 26.3.4, Integrator reset signal .
• Modified the note in Section 16.6.15.48, Pad Configuration Registers 75–82
(SIU_PCR75–SIU_PCR82) .
Frequency-modulated phase
locked loop • Added note in Section 17.5.2, Clock configuration “Maximum system clock
frequency is 150 MHz and max/min VCO frequency is 256 MHz to 512 MHz”.
• Replaced instances of f
ref
with f
fbk
throughout the chapter.
Reaction Module In Section 23.1.1, Features added a note “DMA is not supported in Andorra
devices”.
Table A-6. Changes between revisions 5 and 6 (continued)
Chapter Changes
ENGCLK
SystemClockFrequency
ENGDIVx2
------------------------------------------------------------------ =
ENGCLK
SystemClockorCrystalOscillator
ENGDIVx2
-------------------------------------------------------------------------------------------
=