NXP Semiconductors MPC5644A, Reference Manual, Page: 1495 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1495
NOTE
Both timers are deactivated immediately when the protocol enters a state
different from
POC:normal active or POC:normal passive .
33.5.2.42 Timer 1 Cycle Set Register (FR_TI1CYSR)
This register defines the cycle filter value and the cycle filter mask for timer T1. For a detailed description
of timer T1, refer to
Section 33.6.17.1, Absolute timer T1” .
NOTE
If the application modifies the value in this register while the timer is
running, the change becomes effective immediately and timer T1 will expire
according to the changed value.
33.5.2.43 Timer 1 Macrotick Offset Register (FR_TI1MTOR)
This register holds the macrotick offset value for timer T1. For a detailed description of timer T1, refer to
Section 33.6.17.1, Absolute timer T1” .
Base + 0x005C Write: Anytime
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0
T1_CYC_VAL
0 0
T1_CYC_MSK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-42. Timer 1 Cycle Set Register (FR_TI1CYSR)
Table 33-48. FR_TI1CYSR field description
Field Description
T1_CYC_VAL Timer T1 Cycle Filter Value — This field defines the cycle filter value for timer T1.
T1_CYC_MSK Timer T1 Cycle Filter Mask — This field defines the cycle filter mask for timer T1.
Base + 0x005E Write: Anytime
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0
T1_MTOFFSET
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-43. Timer 1 Macrotick Offset Register (FR_TI1MTOR)
Table 33-49. FR_TI1MTOR field description
Field Description
T1_MTOFFSET Timer 1 Macrotick Offset — This field defines the macrotick offset value for timer 1.