NXP Semiconductors MPC5644A, Reference Manual, Page: 406 / 1735

System Integration Unit (SIU)
MPC5644A Microcontroller Reference Manual, Rev. 6
406 Freescale Semiconductor
16.6.15.4 Pad Configuration Register 3 (SIU_PCR3)
Figure 16-19. Pad Configuration Register (SIU_PCR3)
16.6.15.5 Pad Configuration Register 8 (SIU_PCR8)
Figure 16-20. Pad Configuration Register (SIU_PCR8)
S0x46
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0 0 PA OBE
1
1
When configured as CS[3] or ADDR[11] the OBE bit has no effect. When configured as GPO, set the OBE bit to one.
IBE
2
2
When configured as CS[3] or GPO, set the IBE bit to one to reflect the pin state in the GPDI register. When
configured as GPI, set the IBE bit to one.
DSC ODE
3
3
When configured as CS[3] or ADDR[11], set the ODE bit to zero.
HYS 0 0 WPE
4
4
See the EBI section for weak pull up settings when configured as CS[0].
WPS
4
W
Reset
0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
= Unimplemented or Reserved
Table 16-22. SIU_PCR3 PA values
Signal Name Module Description I/O
1,2
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using
the IBE and OBE bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching
between input and output is handled internally and the IBE and OBE bits are ignored.
PA
Primary CS[3] EBI Chip select O 0b0001
ALT1 ADDR[11] EBI Address bus I/O 0b0010
ALT2 WE[3]/BE[3] EBI Write/byte enable O 0b0100
ALT3 CAL_WE[3]/BE[3] Cal bus Write/byte enable O 0b1000
GPIO GPIO[3] SIU GPIO I/O 0b0000
S0x50
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0 0 0 0 0 PA OBE
1
1
When configured as ADDR[12] the OBE bit has no effect. When configured as GPO, the OBE bit should be set to
one.
IBE
2
2
When configured as ADDR[12] or GPO, the IBE bit may be set to one to reflect the pin state in the corresponding
GPDI register. Setting the IBE bit to zero reduces power consumption. When configured as GPI, the IBE bit should
be set to one.
DSC ODE
3
3
When configured as ADDR[12], the ODE bit should be set to zero.
HYS 0 0 WPE
4
4
See the EBI section for weak pull up settings when configured as ADDR[12]
WPS
4
W
Reset
0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
= Unimplemented or Reserved