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FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
1617
33.7.1.1.1
System bus wait state constraints
The SYMATOR[TIMEOUT] value corresponds directly to a certain acceptable number of wait states on
the system bus.
For single channel configurations and if the sync frame table generation functionality is
not
used
(FR_SFTCCSR[SDVEN,SIDEN] = 0) no timeout will be detected if less than
2*SYMATOR[TIMEOUT] + 1 wait states will be seen on the system bus for each system bus access.
For dual channel configurations, or if the sync frame table generation functionality is used, no timeout will
be detected if less than SYMATOR[TIMEOUT] - 1 wait states will be seen on the system bus for each
system bus access.
33.7.2
Initialization Sequence
This section describes the required steps to initialize the CC. The first subsection describes the steps
required after a system reset, the second section describes the steps required after preceding shutdown of
the CC.
33.7.2.1
Module Initialization
This section describes the module related initialization steps after a system reset.
1. Configure CC.
a) configure the control bits in the
Module Configuration Register (FR_MCR)
b) configure the system memory base address in
System Memory Base Address Register
2. Enable the CC.
a) write 1 to the module enable bit MEN in the
Module Configuration Register (FR_MCR)
The CC now enters the Normal Mode. The application can commence with the protocol initialization
described in
Section 33.7.2.2, Protocol Initialization
”.
33.7.2.2
Protocol Initialization
This section describes the protocol related initialization steps.
1. Configure the Protocol Engine.
a) issue CONFIG command via
Protocol Operation Control Register (FR_POCR)
b) wait for
POC:config
in
Protocol Status Register 0 (FR_PSR0)
c) configure the FR_PCR0,..., FR_PCR30 registers to set all protocol parameters
2. Configure the Message Buffers and FIFOs.
a) set the number of message buffers used and the message buffer segmentation in the
Buffer Segment Size and Utilization Register (FR_MBSSUTR)
b) define the message buffer data size in the
Message Buffer Data Size Register (FR_MBDSR)
c) configure each message buffer by setting the configuration values in the
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...