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System Integration Unit (SIU)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
479
16.6.15.95 Pad Configuration Register 142 (SIU_PCR142)
Figure 16-128. Pad Configuration Register (SIU_PCR142)
16.6.15.96 Pad Configuration Register 143 (SIU_PCR143)
Figure 16-129. Pad Configuration Register (SIU_PCR143)
S0x15C
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
PA
OBE
1
1
When configured as GPO, the OBE bit should be set to one.
IBE
2
2
When configured as PCS or GPO, the IBE bit may be set to one to reflect the pin state in the corresponding GPDI
register. Setting the IBE bit to zero reduces power consumption. The IBE bit must be set to one for GPIO when
configured as input.
0
0
ODE
HYS
SRC
WPE
WPS
3
3
The weak pull up/down selection at reset for the ETPU_A[28] pin is determined by the WKPCFG pin.
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
WKP
= Unimplemented or Reserved
Table 16-131. SIU_PCR142 PA values
Signal
Name
Module
Description
I/O
1,2
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using the IBE and OBE
bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching between input and
output is handled internally and the IBE and OBE bits are ignored.
PA value
Primary
ETPU_A[28]
3
3
The eTPU function controlled by this register has an additional dependency on the SIU_ISEL8 register settings.
Please see
Section 16.6.22, IMUX Select Register 8 (SIU_ISEL8)
, for more detail.
eTPU
eTPU channel
I/O
0b001
ALT1
DSPI_C_PCS[1]
DSPI
Chip select
O
0b010
ALT2
RCH5_B
Reaction
Reaction channel O
0b100
GPIO
GPIO[142]
SIU
GPIO
I/O
0b000
S0x15E
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
PA
OBE
1
1
When configured as GPO, the OBE bit should be set to one.
IBE
2
2
When configured as PCS or GPO, the IBE bit may be set to one to reflect the pin state in the corresponding GPDI
register. Setting the IBE bit to zero reduces power consumption. The IBE bit must be set to one for GPIO when
configured as input.
0
0
ODE
HYS
SRC
WPE
WPS
3
3
The weak pull up/down selection at reset for the ETPU_A[29] pin is determined by the WKPCFG pin.
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
WKP
= Unimplemented or Reserved
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...