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Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
791
24.4.4.2
ETPU_IDLE – eTPU Idle Register
The Idle Counter Register (ETPU_IDLE) continuously counts microcycles in which the microengine is
not busy with channel service. It can be used to measure the microengine utilization by rating the count
measured during a period of time to the number of microcycles contained in the period. The Idle counter
does not count microcycles when the engine is stopped, or is in TST or halt states.
Each eTPU2 engine has an associated ETPU_IDLE register.
Figure 24-11. ETPU_IDLE Register
Offset: eTPU_A: eTP 0x068; eTPU_B: eTP 0x078
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
IDLE_CNT[31:16]
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
IDLE_CNT[15:0]
W
ICLR
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Table 24-22. ETPU_IDLE field description
Field
Description
0-31
IDLE_CNT[31:0]—Idle Count
This is a freerunning count of the number of idle microcycles in the microengine. For more information on
idle counter operation, see
Section 24.5.10.4.1, Idle Counter
31
ICLR—Idle Clear
This write-only bit is used to clear the idle count IDLE_CNT.
1: Clear the idle count IDLE_CNT
0: Do not clear idle count IDLE_CNT
Summary of Contents for MPC5644A
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