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Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
1071
25.6
Functional Description
25.6.1
Overview
The EQADC provides a parallel interface to two on-chip ADCs, a single master to single slave serial
interface to an off-chip external device and a parallel side interface to an on-chip companion module, like
a decimation filter. The two on-chip ADCs are architected to allow access to all the analog channels.
Initially, command data is contained in system memory in a user defined data structure which is likely to
be a queue as depicted in
. Command data is moved between the CQueues and CFIFOs by the
host CPU or by the DMAC which respond to interrupt and DMA requests generated by the EQADC. The
EQADC supports software and hardware triggers from other blocks or external pins to initiate transfers of
commands from the multiple CFIFOs to the on-chip ADCs or to the external device.
Table 25-47. ADC Pull Up/Down Control Register x (ADC_PUDCRx, x=0-7) field description
Field
Description
2-3
CH_PULL
x
[0:1]
Channel
x
Pull Up/Down Control bits
The CH_PULL
x
[0:1] field controls the pull up/down configuration of the channel
x
according
6-7
PULL_STR
x
[0:1]
Pull Up/Down Strength Control bits of channel
x
The PULL_STR
x
[0:1] bit field defines the strength of the channel
x
pull up or down resistors,
Table 25-48. Channel x Pull Up/Down Field Definition
CH_PULLx[0:1]
Definition
00
No Pull resistors connected to the channel
01
Pull Up resistor connected to the channel
10
Pull Down resistor connected to the channel
11
Pull Up and Pull Down resistors connected to the channel
Table 25-49. Pull Up/Down Strength Field Definition
PULL_STRx[0:1]
Definition
00
Reserved
01
200 Kohms pull resistor
10
100 Kohms pull resistor
11
5 Kohms (Approx.) pull resistor
1
1
This set is not available for CH_PULL_
x
= 11.
1.
Command and result data can be stored in the system memory in any user defined data structure. However, in this
document it will be assumed that the data structure of choice is a queue, since it is the most likely data structure to be used
and because queues are the only type of data structure supported by the DMAC.
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...