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Deserial Serial Peripheral Interface (DSPI)
MPC5644A Microcontroller Reference Manual, Rev. 6
1290
Freescale Semiconductor
30.9
Functional description
The Deserial Serial Peripheral Interface (DSPI) module supports full-duplex, synchronous serial
communications between MCUs and peripheral devices. The DSPI can also be used to reduce the number
of pins required for I/O by serializing and deserializing up to 32 Parallel Input/Output signals. All
communications are done with SPI-like protocol.
The DSPI has three configurations:
•
SPI configuration in which the DSPI operates as a basic SPI or a queued SPI.
•
DSI configuration in which the DSPI serializes and deserializes Parallel Input/Output signals or
bits from memory mapped register.
•
CSI configuration in which the DSPI combines the functionality of the SPI and DSI configurations.
Field DSPI_MCR[DCONF] determines the DSPI configuration. See
configuration values.
Registers DSPI_CTAR0 – DSPI_CTAR7 hold clock and transfer attributes. The SPI configuration allows
to select which DSPI_CTAR to use on a frame by frame basis by setting a field in the SPI command. The
DSI configuration statically selects which DSPI_CTAR to use. In CSI configuration priority logic
determines if SPI data or DSI data is transferred and dictates what DSPI_CTAR is used for the data
transfer. See
Section 30.8.2.4, DSPI Clock and Transfer Attributes Registers 0–7
, for information on the fields of the DSPI_CTAR registers.
Typical master to slave connections are shown in
. When a data transfer operation is
performed, data is serially shifted a predetermined number of bit positions. Because the modules are
linked, data is exchanged between the master and the slave. The data that was in the master shift register
is now in the shift register of the slave, and vice versa. At the end of a transfer, bit DSPI_SR[TCF] is set
to indicate a completed transfer.
Table 30-31. DSPI_DIPR Field Descriptions
Field
Description
DP[]
Data Polarity. The DP bits define what value of the received deserialization data sets the
DSPI_SR[DDIF] bit.
0 if received bit is 0 the DSPI_SR[DDIF] bit is set.
1 if received bit is 1 the DSPI_SR[DDIF] bit is set.
Summary of Contents for MPC5644A
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Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...