NXP Semiconductors MPC5644A, Reference Manual, Page: 1191 / 1735

Decimation Filter
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1191
26.4.2.4 Decimation Filter Module Extended Status Register (DECFILTER_MXSR)
1
The hardware input signals are ZSELA for Decimation filter A and ZSELB for Decimation filter B, defined in
Section 16.6.24, IMUX Select Register 10 (SIU_ISEL10) .
2
The hardware input signals are HSELA for Decimation filter A and HSELB for Decimation filter B, defined in
Section 16.6.24, IMUX Select Register 10 (SIU_ISEL10) .
Address: DECFILTE 0x00C Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
SDFC SSEC SCEC
SSOV
F
C
SCOVFC
SVRC
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0 0 0 0 0 0 SDF 0 0 SSE SCE 0
SSOV
F
SCOVF
SVR
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-5. Decimation Filter Extended Status Register (DECFILTER_MXSR)
Table 26-17. DECFILTER_MXSR Register Field Descriptions
Field Description
0–6 Reserved, should be cleared.
7
SDFC
Integrator Output Data Flag Clear bit. The SDFC bit clears the SDF Flag bit in the Status
Register. This bit is self negated, therefore it is always read as zero.
1 Clears SDF
0 No action
8–9 Reserved, should be cleared.
10
SSEC
Integrator Sum Exception Clear bit. The SSEC bit clears the SSE flag bit in the Status Register.
This bit is self negated, therefore it is always read as zero.
1 Clears SSE
0 No action
11
SCEC
Integrator Count Exception Clear bit. The SCEC bit clears the SCE flag bit in the Status Register.
This bit is self negated, therefore it is always read as zero.
1 Clears SCE
0 No action
12 Reserved, should be cleared.
13
SSOVFC
Integrator Sum Overflow Clear bit. The SSOVFC bit clears the SSOVF Flag bit in the Status
Register. This bit is self negated, therefore it is always read as zero.
1 Clears SSOVF
0 No action