
Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
954
Freescale Semiconductor
24.5.9.4.4
Return from subroutine
When a subroutine
call
or a
dispatch call
microoperation is executed, the return address is saved in the
RAR. To return from a subroutine a microoperation is available to load the contents of the RAR back to
the PC. Fields R/D (2 bits) or RTN (1 bit,
) can be used to return from subroutine. For R/D
Return from subroutine microoperation is affected by FLS (see
Section 24.5.9.4.5, Flush pipeline
) when
field R/D is used. Return execution through RTN always flushes the pipeline.
24.5.9.4.5
Flush pipeline
When a branch, dispatch or subroutine return microoperation is executed, the next microinstruction can be
executed unconditionally before the flow change takes effect, since microengine has a two-stage pipeline.
Executing the next microinstruction after a branch maximizes execution performance. This feature is
controlled by field FLS (1 bit,
). When FLS = 0 the pipeline is flushed, so the next
microinstruction placed after a branch is decoded as NOP if the branch is taken. If FLS = 1, the
microinstruction placed after the branch is executed, either if the branch is taken or not, as shown in
.
Flush also controls which value is stored in RAR in a call: in case of no flush, it is the address of the
branch/dispatch instr 2, even if RAR is the ALU destination of the instruction after the call; in case
of a flush, it is the address of the instruction following branch/dispatch.
If a branch with no flush is followed by another branch with no flush, the instructions are executed in the
following order:
1. First branch
2. Second branch
3. First branch’s destination instruction
4. Second branch’s destination instruction, and the flow proceeds normally from then on
The destination of the first branch must not be another flow changing instruction (branch, return or
dispatch). Similar flows apply when returns or dispatches are used instead of branches. This scheme can
be used to implement quick table look-ups with a dispatch replacing the first branch, for instance.
Table 24-115. Return from Sub-routine – RTN
RTN
Meaning
0
return with pipeline flush
1
do not return
Table 24-116. Flush Pipeline – FLS
FLS
Meaning
0
flush pipeline when jump / call / dispatch jump / dispatch
call / return is executed
1
do not flush pipeline when jump / call / dispatch jump /
dispatch call / return is executed
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...