NXP Semiconductors MPC5644A, Reference Manual, Page: 1415 / 1735

FlexCAN Module
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1415
Table 32-12. ESR Register field descriptions
Field Description
TWRNINT Tx Warning Interrupt Flag
If the WRNEN bit in MCR is asserted, the TWRNINT bit is set when the TXWRN flag transition
from ‘0’ to ‘1’, meaning that the Tx error counter reached 96. If the corresponding mask bit
(CR[TWRNMSK]) is set, an interrupt is generated to the CPU. This bit is cleared by writing it to ‘1’.
Writing ‘0’ has no effect.
1: The Tx error counter transition from < 96 to

96
0: No such occurrence
RWRNINT Rx Warning Interrupt Flag
If the WRNEN bit in MCR is asserted, the RWRNINT bit is set when the RXWRN flag transition
from ‘0’ to ‘1’, meaning that the Rx error counters reached 96. If the corresponding mask bit
(CR[RWRNMSK]) is set, an interrupt is generated to the CPU. This bit is cleared by writing it to ‘1’.
Writing ‘0’ has no effect.
1: The Rx error counter transition from < 96 to

96
0: No such occurrence
BIT1ERR Bit1 Error
This bit indicates when an inconsistency occurs between the transmitted and the received bit in a
message.
1: At least one bit sent as recessive is received as dominant
0: No such occurrence
Note: This bit is not set by a transmitter in case of arbitration field or ACK slot, or in case of a node
sending a passive error flag that detects dominant bits.
BIT0ERR Bit0 Error
This bit indicates when an inconsistency occurs between the transmitted and the received bit in a
message.
1: At least one bit sent as dominant is received as recessive
0: No such occurrence
ACKERR Acknowledge Error
This bit indicates that an Acknowledge Error has been detected by the transmitter node, i.e., a
dominant bit has not been detected during the ACK SLOT.
1: An ACK error occurred since last read of this register
0: No such occurrence
CRCERR Cyclic Redundancy Check Error
This bit indicates that a CRC Error has been detected by the receiver node, i.e., the calculated
CRC is different from the received.
1: A CRC error occurred since last read of this register.
0: No such occurrence
FRMERR Form Error
This bit indicates that a Form Error has been detected by the receiver node, i.e., a fixed-form bit
field contains at least one illegal bit.
1: A Form Error occurred since last read of this register
0: No such occurrence