NXP Semiconductors MPC5644A, Reference Manual, Page: 1026 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
1026 Freescale Semiconductor
25.5.2.7
EQADC
CFIFO Control Registers (
EQADC
_CFCR)
The EQADC CFIFO Control Registers (EQADC_CFCR) contain bits that affect CFIFOs. These bits
specify the CFIFO operation mode and can invalidate all of the CFIFO contents.
Figure 25-8. EQADC CFIFO Control Register 0 ( EQADC _CFCR0)
Table 25-10.
EQADC
RFIFO Pop Register x (
EQADC
_RFPRx) field description
Field Description
16-31
RF_POPx
[0:15]
Result FIFO Pop Data x
When RFIFOx is not empty, the RF_POPx contains the next unread entry value of RFIFOx .
Reading a word, a half-word, or any bytes from EQADC_RFPRx will pop one entry from
RFIFOx and cause the RFCTRx field to be decremented by one in the
Section 25.5.2.9,
EQADC FIFO and Interrupt Status Registers (EQADC_FISR) . When the RFIFOx is empty,
any read on EQADC_RFPRx returns undefined data value and does not decrement the
RFCTRx value. Writing to EQADC_RFPRx has no effect.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0
CFE
EE0
STR
ME0
0 0 0
MODE0 AMODE0
W SSE
0
CFIN
V0
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0
MODE1
0 0 0 0
W SSE
1
CFIN
V1
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
= Unimplemented or Reserved
Register address: EQA0x050