NXP Semiconductors MPC5644A, Reference Manual, Page: 1148 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
1148 Freescale Semiconductor
25.6.10 EQADC Parallel Side Interface (PSI) Sub-Block
Figure 25-89.
EQADC
Parallel Side Interface Block Diagram
The EQADC PSI sub-block allows communication between the EQADC and the companion modules
through a local slave bus that has the EQADC block as the master and the companion modules as the
slaves. However, due to the poor processing capability of EQADC, it is defined a very limited number of
addresses and a maximum of 15 different slave blocks to be enabled.
The conversion result goes through the Result Formatting and Calibration sub-block and the
corresponding MESSAGE_TAG and DEST fields are decoded to decide the destination of the conversion
result data. When the DEST field is not zero as described in
Section 25.5.3.6, Alternate Configuration 1-8
Control Registers (ADC_ACR1-8) , the MESSAGE_TAG bits, and some control bits, and the conversion
result data are sent to the transmission section of the PSI sub-block. This set of data is processed and sent
to the corresponding on-chip companion module.
The companion module can also send back to EQADC the result of some processing in the received data.
In this case, the receiver section of he PSI sub-block treats this request and receives the result data with
the corresponding MESSAGE_TAG or TAG field. This TAG is used by the decoder to select which RFIFO
will be written with the received companion module data.
ADC Conv Data,
rdata
Read / Write
Sel
Tx
Section
Result Data
Rx
Section
addr, rwb, module_en
wdata
DEST
MESSAGE_TAG,
Write request
Read request
TAG
PSI Ready
Flush, Ctrl
From: FIFO
Control
Unit
To: FIFO
Control
Unit
P
S
I Slave Bus inter
face
DMA interface
signals