NXP Semiconductors MPC5644A, Reference Manual, Page: 1543 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1543
The structure of the frame header in the message buffer header field for transmit message buffers assigned
to key slot is given in
Figure 33-121 .
Figure 33-121. Frame header structure (transmit message buffer for key slot)
Frame header access
The frame header is located in the FlexRay memory area. To ensure data consistency, the application must
follow the write access scheme described below.
For receive message buffers, receive shadow buffers, and receive FIFOs, the application must not write to
the frame header field.
For transmit message buffers, the application must follow the write access restrictions given in
Table 33-94 . This table shows the condition under which the application can write to the frame header
entries without corrupting the FlexRay message transmission.
Frame header checks
As shown in Figure 33-120 and Figure 33-121 not all fields in the message buffer frame header are used
for transmission. Some fields in the message buffer frame header are ignored, some are used for
transmission, and some of them are checked for correct values. All checks that will be performed are
described below.
For message buffers assigned to the key slot, no checks will be performed.
The value of the FID field must be equal to the value of the corresponding Message Buffer Frame ID
Registers (FR_MBFIDRn) . If the CC detects a mismatch while transmitting the frame header, it will set
the frame ID error flag FID_EF in the CHI Error Flag Register (FR_CHIERFR) . The value of the FID field
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0x0 R PPI NUF SYF SUF FID
0x2 CYCCNT PLDLEN
0x4 HDCRC
= not used
Table 33-94. Frame header write access constraints (transmit message buffer)
Field
Single buffered segments Double buffered segments
Static Dynamic
Static Dynamic
Commit side Transmit side Commit side Transmit side
FID POC:config or MB_DIS
PPI,
PLDLEN
,
HDCRC
POC:config or MB_DIS or
MB_LCK MB_LCK