NXP Semiconductors MPC5644A, Reference Manual, Page: 729 / 1735

Reaction Module (REACM)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 729
Figure 23-29. Limitation on the OFF modulation timing
23.5.3.2 Minimum timer control pulse width
There is no limitation on the Timer Control pulse minimum width. The channel just finishes the
modulation process when the pulse ends even if the Modulation Words did not complete the expected
sequence. Thus if a modulation phase is designed to have four Modulation Words starting from word 0,
and the Timer Pulse ends at the second word (word 1) then the modulation process finishes at this point in
time. The channel output is set to DOFF one clock cycle after the Timer Pulse ends and the flag SQER is
set because the SM bit field for the second modulation word is not 00. This flag occurs to indicate that the
modulation was ended before the last phase of the sequence that uses the modulation word 3 and has
SM = 00.
Figure 23-30 describes the channel behavior when an early end of the Timer Control pulse occurs. Note
that the channel output is driven to DOFF which causes the modulation to end. Note that an early end of
pulse only affects the current modulation cycle. Meaning that on the next modulation cycle the modulation
word 0 is executed first and all subsequent words are executed in the appropriate sequence.
ON
OFF
eTPU CH0
Reaction CH0
time
i
time
timer control
modulated current
ON
minimum distance between
pulses was violated
v
modulation does not
start
channel waits for neg edge
to re-enable modulation
modulation occurs on the next
timer pulse
OFF
ON
<64
>64