NXP Semiconductors MPC5644A, Reference Manual, Page: 222 / 1735

Flash memory
MPC5644A Microcontroller Reference Manual, Rev. 6
222 Freescale Semiconductor
Table 12-2. Flash Shadow block mapping
Offset from FLASH_BASE
(0x0000_0000)
Use
0x00FF_C000 – 0x00FF_FDD7 General use
0x00FF_FDD8 Serial passcode (0xFEED_FACE_CAFE_BEEF)
0x00FF_FDE0 Censorship control word (0x55AA_55AA)
0x00FF_FDE4 General use
0x00FF_FDE8 LMLR reset configuration (0x0010_0000)
0x00FF_FDEC General use
0x00FF_FDF0 HLR reset configuration (0x0FFF_FFFF)
0x00FF_FDF4 General use
0x00FF_FDF8 SLMLR reset configuration (0x000F_FFFF)
0x00FF_FDFD General use
0x00FF_FE10 NVUSR0
0x00FF_FE14 – 0x00FF_FFFF General use
Table 12-3. Flash configuration register memory map
Offset from
FLASH_x_
REGS_BASE
1
Register Location
0x0000 MCR—Module configuration register on page
12-223
0x0004 LMLR—Low-/mid-address space block lock register on page
12-228
0x0008 HLR—High-address space block lock register on page
12-229
0x000C SLMLR—Secondary low/mid-address space block lock register on page
12-230
0x0010 LMSR—Low-/mid-address space block select register on page
12-231
0x0014 HSR—High-address space block select register on page
12-232
0x0018 AR—Address register on page
12-233
0x001C BIUCR
2
—Bus interface unit configuration register on page
12-234
0x0020 BIUAPR
2
—Bus interface unit access protection register on page
12-237
0x0024 BIUCR2
2
—Bus interface unit configuration register 2 on page
12-238
0x0028 – 0x0038 Reserved