NXP Semiconductors MPC5644A, Reference Manual, Page: 604 / 1735

Error Correction Status Module (ECSM)
MPC5644A Microcontroller Reference Manual, Rev. 6
604 Freescale Semiconductor
18.4.4.11 RAM ECC Attributes Register (ECSM_REAT)
The ECSM_REAT register is an 8-bit register for capturing the XBAR bus master attributes of the last,
properly-enabled ECC event in the RAM memory. Depending on the state of the ECC Configuration
Register, an ECC event in the RAM causes the address, attributes and data associated with the access to
be loaded into the ECSM_REAR, ECSM_PRESR, ECSM_REMR, ECSM_REAT and ECSM_REDR
registers, and the appropriate flag (RNCE) in the ECC Status Register to be asserted. The ECSM_REAT
register is read-only.
Register address: ECSM Base + 0x0066 (0xFFF4_0066)
0 1 2 3 4 5 6 7
R 0 0 0 0 REMR[3:0]
W
Reset 0 0 0 0 — — — —
= Unimplemented
Figure 18-13. RAM ECC Master Number Register (ECSM_REMR)
Table 18-16. ECSM_REMR field description
Name Description
4–7
REMR[3:0]
RAM ECC Master Number Register
This 4-bit register contains the XBAR bus master number of the faulting access of the last,
correctly-enabled RAM ECC event.
Register address: ECSM Base + 0x0067 (0xFFF4_0067)
0 1 2 3 4 5 6 7
R WRITE SIZE[2:0] PROT0 PROT1 PROT2 PROT3
W
Reset — — — — — — — —
= Unimplemented
Figure 18-14. RAM ECC Attributes (ECSM_REAT) Register