NXP Semiconductors MPC5644A, Reference Manual, Page: 579 / 1735

Frequency-modulated phase locked loop (FMPLL)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 579
external reference, no reset or interrupts are generated. Furthermore, no reset or interrupts are generated
when lock is lost due to a write to the FMPLL_SYNCR in legacy mode which modifies the PREDIV or
MFD fields, or a write to FMPLL_ESYNCR1 in enhanced mode which modifies the EMODE, EPREDIV,
EMFD or CLKCFG[1:0] fields.
17.5.5 Frequency modulation
Frequency modulation uses a triangular profile as shown in Figure 17-8 . The modulation frequency and
depth are set using the MODPERIOD and INCSTEP fields of the FMPLL_SYNFMMR.
Figure 17-8. Triangular frequency modulation
Table 17-14. Loss-of-clock interrupt request
Operating mode LOCEN
1
1
LOCEN is the loss-of-clock enable bit in either FMPLL_SYNCR or FMPLL_ESYNCR2, depending on the
FMPLL_ESYNCR1[EMODE].
LOCIRQ
2
2
LOCIRQ is the loss-of-clock interrupt enable bit in either FMPLL_SYNCR or FMPLL_ESYNCR2, depending on the
FMPLL_ESYNCR1[EMODE].
Interrupt request
Reference
failure
FMPLL failure
Bypass mode with external reference and PLL off — — — —
Bypass mode with crystal reference and PLL off — — No —
Bypass mode with external reference and PLL running — — — —
Bypass mode with crystal reference and PLL running — — No —
Normal mode with external reference 0 — — No
1 0 — No
1 1 — Yes
Normal mode with crystal reference 0 — No No
1 0 No No
1 1 Yes Yes
2 x MD
MD
f
sys
f
sys
Center Spread
Down Spread
f
sys
= PLL nominal frequency
MD = Modulation depth percentage