NXP Semiconductors MPC5644A, Reference Manual, Page: 543 / 1735

System Integration Unit (SIU)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 543
16.6.27 Compare A High Register (SIU_CARH)
The SIU_CARH register holds the 32-bit value that is compared against the value in the SIU_CBRH
register. The CMPAH field is read/write and is reset by the IP Green-Line synchronous reset signal.
Figure 16-212. Compare A High Register (SIU_CARH)
16.6.28 Compare A Low Register (SIU_CARL)
The SIU_CARL register holds the 32-bit value that is compared against the value in the SIU_CBRL
register. The CMPAL field is read/write and is reset by the IP Green-Line synchronous reset signal.
29 Reserved
30:31
EBDF
External Bus Division Factor. The EBDF field specifies the frequency ratio between the system clock and
CLKOUT. The EBDF field must not be changed during an external bus access or while an access is
pending.
00 External bus division factor = 1
01 External bus division factor = 2
10 Reserved
11 External bus division factor = 4
Note: The reset value of the EBDF field is divide-by-2. After reset, if EBDF is changed to divided-by-1,
no glitches occurs on the CLKOUT signal, but if EBDF is changed back to divide-by-2 or
divide-by-4, there is no guarantee that the switch will be glitchless.
SI 0x988
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
CMPAH
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CMPAH
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
= Unimplemented or Reserved
Table 16-216. SIU_ECCR field description (continued)
Field Description