NXP Semiconductors MPC5644A, Reference Manual, Page: 616 / 1735

Software Watchdog Timer (SWT)
MPC5644A Microcontroller Reference Manual, Rev. 6
616 Freescale Semiconductor
20.3.2.2 SWT Interrupt Register (SWT_IR)
The SWT_IR contains the time-out interrupt flag.
20.3.2.3 SWT Time-Out Register (SWT_TO)
The SWT Time-Out (SWT_TO) register contains the 32-bit time-out period. The reset value for this
register is device specific. This register is read-only if either the SWT_MCR[HLK] or SWT_MCR[SLK]
bits are set.
STP Stop Mode Control
Allows the watchdog timer to be stopped when the device enters stop mode
0 = SWT counter continues to run in stop mode
1 = SWT counter is stopped in stop mode
FRZ Debug Mode Control
Allows the watchdog timer to be stopped when the device enters debug mode
0 = SWT counter continues to run in debug mode
1 = SWT counter is stopped in debug mode
WEN Watchdog Enabled
0 = SWT is disabled
1 = SWT is enabled
Offset 0x0004 Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0
0
0 0 0 0 0 TIF
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-2. SWT Interrupt Register (SWT_IR)
Table 20-3. SWT_IR field description
Field Description
TIF Time-out Interrupt Flag
The flag and interrupt are cleared by writing a ‘1’ to this bit. Writing a ‘0’ has no effect.
0 = No interrupt request
1 = Interrupt request due to an initial time-out
Table 20-2. SWT_MCR field description (continued)
Field Description