NXP Semiconductors MPC5644A, Reference Manual, Page: 1205 / 1735

Decimation Filter
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1205
NOTE
When the device slave-bus is selected (standalone or PSI input mixed mode)
for output and DMA is not selected (DSEL = 0), the ODF flag must be
cleared to avoid overrun, even if its corresponding interrupt is not used
(ODEN = 0).
Prefill inputs do not cause IIR or FIR output overrun in standalone, normal, and cascade tail modes, but
can cause overruns in cascade head or middle configurations (see
Section 26.2.3.5, Cascade mode ”).
When bypass is selected, the output overrun does not occur because the data written into the input buffer
is written into the output buffer only when this buffer is empty, but an input overrun may still occur (see
Section 26.5.3.1, Input buffer overrun ”).
26.5.4.2 Triggered output result description
The posting of a filter output, either to the PSI interface or to the device slave-bus can be controlled by an
additional input trigger signal (see
Section 26.3.1, Decimation trigger signal ”). It allows the decimation to
be controlled by another circuit, instead of the internal decimation counter.
Triggered output operation is enabled by the bit TORE in the configuration register DECFILTER_MCR.
When triggered output is enabled, the decimation count configured by DECFILTER_MCR field
DEC_COUNTER is ignored. The decimation filter detects the rising edge or the falling edge of the trigger
signal as selected by the configuration field TMODE in the DECFILTER_MCR. When the corresponding
edge is detected, the output buffer is enabled to receive the next filter result.
The input trigger signal can also be used as a simple filtered output enable: in this trigger mode, when the
input trigger signal is asserted, every filtered output is posted to the output buffer; no output is posted when
the signal is negated. This trigger mode and the assertion polarity (active 0 or 1) of the input trigger signal
is also defined in the DECFILTER_MCR field TMODE.
26.5.5 Bypass configuration description
Bypass operation is configured by setting the field FTYPE[1:0] of module configuration register
DECFILTER_MCR to 00. In this case, the input sample and tag are sent to the output with no change. This
behavior is independent of the ISEL/MIXM setting. The following applies to the bypass configuration:
• flush is ignored
• prefill is ignored
• trigger or counted decimation is ignored
• BSY bit is not set
• the input and output flags are set
NOTE
Bypass must not be configured in cascade mode (see Section 26.5.16,
Cascade mode description ”).