NXP Semiconductors MPC5644A, Reference Manual, Page: 937 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 937
Max constant generation with T4BBS = 111
When T4BBS = 111, BINV = 0, and CIN = 0, the value assigned to BS will be 0x800000, and not 0x0 as
expected. See
Section , Generating “max” constant , for a detailed explanation.
Special T4ABS source operation: Read match registers
When T4ABS = 0101 and the source for T4ABS is selected from the second register set, the constant 0x00
is used as AS (8-bit size) and the following register transfer is performed in parallel as well: match registers
of the selected channel (value in CHAN register) are copied to ERTA/ERTB registers, where ERTA
receives the value of MatchA register and ERTB receives the value of MatchB register (see
Section 24.5.5.1.1, ER – Event Registers ). Note that ALU destination can still be chosen by T2ABD in
parallel. When ERTA or ERTB is selected by T2ABD, a parallelism issue arises (see Section 24.5.9.6.1,
ALU operations and read match registers ).
CHAN_BASE as a Source
Each channel has a parameter base address in SPRAM, which is configured in ETPU_CxCR registers,
CPBA field (see
Section 24.4.7.1, ETPU_CxCR – eTPU Channel x Configuration Register ).
CHAN_BASE, which represents a parameter address (CPBA*2), can be used as A-source using
T4ABS = 1010 when T4ABS selects a source from the second register set. In this case, CHAN_BASE is
loaded into AS[13:2] to form the byte address (AS[23:14] = 0, AS[1:0] = 0). For example, in Indirect
addressing mode, where the destination register is DIOB, CHAN_BASE is loaded into DIOB[13:2], which
is the parameter address, and DIOB[13:0] represents the byte address. CHAN_BASE is the base address
of the selected channel (given by CHAN register).
24.5.9.2.3 Flags sampling control
This section explains how the flags Z (zero), C (carry), N (negative) and V (overflow) are updated in an
ALU operation. When there are post-ALU shift operations, the ALU Carry Out is not directly sampled in
Carry flag, but passed to the post-ALU shifter (see
Section 24.5.9.2.6, Shift operations ). Since the size of
source operands in ALU operations is variable, flags can be sampled as an operation of 8, 16 or 24 bits
wide. The operation size selection is automatic, based on defined sizes of sources and destination, using
the equation:
operation_size = minor(size_of(destination), greater(size_of(A-Source), size_of(B-Source)))
Operation size can also be shown with the following table:
Table 24-83. Operation size determination
A Source B Source Destination Operation size
x x 8 bits 8 bits
8 bits 8 bits x 8 bits
16 or 24 bits x 16 bits 16 bits
16 bits 8 or 16 bits 24 bits 16 bits
8 or 16 bits 16 bits 24 bits 16 bits