NXP Semiconductors MPC5644A, Reference Manual, Page: 1048 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
1048 Freescale Semiconductor
25.5.2.15
EQADC
STAC Client Configuration Register (
EQADC
_REDLCCR)
The EQADC STAC Client Configuration Register (EQADC_REDLCCR) contains bits used to control
which time slots the EQADC selects to obtain pre-defined external time bases.
Figure 25-24. EQADC STAC Client Configuration Register (EQADC_REDLCCR)
Table 25-25. EQADC SSI Receive Data Register (EQADC_SSIRDR) field description
Field Description
0
RDV
Receive Data Valid Bit
The RDV bit indicates if the last received data is valid. This bit is cleared automatically
whenever the EQADC_SSIRDR register is read. Writes have no effect.
1 Receive data is valid.
0 Receive data is not valid.
6-31
R_DATA
[0:25]
EQADC Receive DATA Field
The R_DATA contains the last result message that was shifted in. Writes to the R_DATA
have no effect. Messages that were not completely received due to a transmission abort will
not be copied into EQADC_SSIRDR.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
REDBS2 SRV2 REDBS1 SRV1
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
= Unimplemented or Reserved
Register address:
EQADC
_BASE+0x0D0
Table 25-26. EQADC STAC Client Configuration Register (EQADC_REDLCCR) field description
Field Description
REDBS m
[0:3]
STAC Timebase Bits Selection, where m ( m =1,2)
The REDBS m field selects 16 bits from the total of 24 bits that are received from the STAC
interface as described in below. Consider TBASE m [0:23] the selected time base from slot
SRV m:
SRV m
[0:3]
STAC bus Server Data Slot Selector m ( m =1,2)
The field SRV m indicates the slot number that contains the desired time base value sent by
the STAC server. It is possible to have up to 16 different sources to be selected.