NXP Semiconductors MPC5644A, Reference Manual, Page: 1099 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1099
priority CFIFO is always served first. A TRIGGERED, not-underflowing CFIFO will start the transfer of
its commands when:
• its commands are bound for an internal CBuffer that is not full, and it is the highest priority
triggered CFIFO sending commands to that CBuffer.
• its commands are bound for an external CBuffer that is not full, and it is the highest priority
triggered CFIFO sending commands to an external CBuffer that is not full.
A triggered CFIFO with commands bound for a certain CBuffer consecutively transfers its commands to
it until:
• an asserted End Of Queue bit is reached, or;
• an asserted Pause bit is encountered and the CFIFO is configured for edge trigger mode, or;
• CFIFO is configured for level trigger mode and a closed gate is detected, or;
• in case its commands are bound for an internal CBuffer, a higher priority CFIFO that uses the same
internal CBuffer is triggered, or;
• in case its commands are bound for an external CBuffer, a higher priority CFIFO that uses an
external CBuffer is triggered.
The prioritization logic of the EQADC, depicted in Figure 25-65 , is composed of three independent
sub-blocks: one prioritizing CFIFOs with commands bound for CBuffer0, another prioritizing CFIFOs
with commands for CBuffer1, and a last one prioritizing CFIFOs with commands for CBuffer2 and
CBuffer3 which reside inside the external device. As these three sub-blocks are independent, simultaneous
writes to CBuffer0, to CBuffer1, and to EQADC SSI transmit buffer are allowed. The hardware identifies
the destination of a command by decoding the EB and BN bits in the command message - see
Section 25.6.2.3, Message Format in EQADC , for details.
NOTE
Triggered but empty CFIFOs, underflowing CFIFOs, are not considered for
prioritization. No data from these CFIFOs will be sent to the CBuffers and
nor will they stop lower priority CFIFOs from transferring commands.
Whenever CBuffer0 is able to receive new entries, the prioritization sub-block selects the highest-priority
triggered CFIFO with a command bound for CBuffer0, and writes its command into the buffer. In case
CBuffer0 is able to receive new entries but there are no triggered CFIFOs with commands bound for it,
nothing is written to the buffer. The sub-block prioritizing CBuffer1 usage behaves in the same way.
When the EQADC SSI is enabled and ready to start serial transmissions, the sub-block prioritizing
EQADC SSI usage writes command or null messages into the EQADC SSI transmit buffer, data written
to the EQADC SSI transmit buffer is subsequently transmitted to the external device through the EQADC
SSI link. The sub-block writes commands to the EQADC SSI transmit buffer when there are triggered
CFIFOs with commands bound for not-full external CBuffers. The command written to the transmit buffer
belongs to the highest priority CFIFO sending commands to a external CBuffer that is not full. This implies
that a lower priority CFIFO can have its commands sent if a higher priority CFIFO cannot send its
commands due to a full CBuffer. The sub-block writes null messages to the EQADC SSI transmit buffer
when there are no triggered CFIFOs with commands bound for external CBuffers, or when there are
triggered CFIFOs with commands bound for external CBuffers but the external CBuffers are full. The
EQADC monitors the status of the external CBuffers by decoding the BUSY fields of the incoming result