NXP Semiconductors MPC5644A, Reference Manual, Page: 984 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
984 Freescale Semiconductor
Conclusion: in this system configuration DIO can keep track of the input level at a minimum of
every 6125 ns.
Note that DIO function optimized for eTPU hardware can use double transition mode to measure
two pin transitions at a time and reduce the service time, improving the overall system performance
and latency.
24.6.5.5 Second-pass worst-case latency analysis
Following is an example of a second-pass analysis for calculating worst-case latency for a channel. The
second-pass analysis is useful for higher-performance systems, since it gives a more realistic worst-case
latency result than first-pass analysis.
This example uses a relatively simple system in order to illustrate the basic principles of second-pass
analysis. For a more complex example of second-pass analysis, refer to Multiphase Motor Commutation
TPU Function (COMM)(TPUPN09/ D).
24.6.5.5.1 Second-pass analysis guidelines
Rather than use a fixed formula, a second-pass analysis relies on the application of the following
guidelines.
1. The first-pass analysis makes the assumption that all channels in the system are continually
requesting service. For many systems this is an unrealistic assumption. For example, if TCR1 is
counting at a rate of 2 MHz (500 ns per count) and a channel is running the DIO function with a
match rate of 20,000 TCR1 counts, the DIO will request service every 10 ms (20,000 * 500 ns =
10,000,000 ns or 10 ms). It is therefore unrealistic to assume that the channel running this DIO
function is continuously requesting service. Figure out a realistic service request rate for each
channel. Time slots can then be mapped to each channel at the real rate of request.
2. If a function is active during system initialization but not during the high-speed running mode of
the system, then that system does not need to be included in the high-speed worst-case latency
calculations.
3. Use a realistic SPRAM collision rate.
4. Be careful when assigning functions priority levels and channel numbers. Decide which function
or functions will be most difficult to make perform at the desired level. Assign those channels high
priority and low channel numbers. Try different priority and channel assignments to see how it
affects the system.
5. The seven-slot sequence of || H | M | H | L | H | M | H || is asymmetrical when put back-to-back with
other seven-slot sequences. Note that in the following sequence there are two high-priority slots
next to each other:
|| H | M | H | L | H | M | H |||| H | M | H | L | H | M | H ||
6. Make sure that when mapping out channels to the sequence, you choose a worst-case slot to start
the mapping. For example, when estimating WCL for a high-priority channel, do not start the
mapping in the last high-priority slot in a seven-slot sequence, as that is a best case for a
high-priority channel since another high-priority time slot is next.