NXP Semiconductors MPC5644A, Reference Manual, Page: 1072 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
1072 Freescale Semiconductor
CFIFOs can be configured in single-scan or continuous-scan mode. When a CFIFO is configured in
single-scan mode, the EQADC scans the CQueue one time. The EQADC stops transferring commands
from the triggered CFIFO after detecting the EOQ bit set in the last transfer. After an EOQ bit is detected,
software involvement is required to rearm the CFIFO so that it can detect new trigger events.
When a CFIFO is configured for continuous-scan mode, the whole CQueue is scanned multiple times.
After the detection of an asserted EOQ bit in the last command transfer, command transfers can continue
or not depending on the mode of operation of the CFIFO.
CFIFO0 has a special configuration option to allow a repetitive sequence of conversion commands
(streaming mode) with high priority characteristics (abort operation) or not. This feature is useful with the
immediate conversion command feature that allows the immediate execution of a conversion command or
a sequence of commands with critical timing even with the possibility of abortion of some current ADC
conversion in progress. The aborted command is stored and executed again as soon as the critical timing
commands have been finished.
The multiple Result FIFOs (RFIFOs) can receive data from the on-chip ADCs, from an off-chip external
device or from an on-chip companion module. Data from the on-chip ADCs can be routed to the side
interface, processed by the on-chip companion module and then routed back through the side interface to
the RFIFOs.
25.6.2 Data Flow in
EQADC
25.6.2.1 Overview and Basic Terminology
Figure 25-48 shows how command data flows inside the EQADC system. A Command Message is the
predefined format at which command data is stored on the CQueues. A Command message has 32 bits and
is composed of two parts: a CFIFO header and an ADC Command. Command messages are moved from
the CQueues to the CFIFOs by the host CPU or by the DMAC as they respond to interrupt and DMA
requests generated by the EQADC. The EQADC generates these requests whenever a CFIFO is not full.
The
FIFO Control Unit will only transfer to a CBuffer the ADC command part of the Command Message.
Information in the CFIFO header together with the upper bit of the ADC command is used by the FIFO
Control Unit to arbitrate which triggered CFIFO will be transferring the next command. Since command
transfer through the serial interface can take significantly more time than a parallel transfer to the on-chip
ADCs, command transfers for on-chip ADCs occur concurrently with the ones through the serial interface.