NXP Semiconductors MPC5644A, Reference Manual, Page: 1053 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1053
25.5.2.17
EQADC
CFIFO0 Extension Registers (EQADC_CF0ERw) (w=0, .., 3)
The EQADC CFIFO0 Extension Registers (EQADC_CF0ERw) (w=0, .., 3) provide visibility of the
contents of the extended portion of CFIFO0 for debugging purposes. There are four registers which are
uniquely mapped to its four 32-bit entries. Refer to
Section 25.6.4, EQADC Command FIFOs , for more
information on CFIFOs. These registers are read only. Data written to these registers is ignored.
Figure 25-31.
EQADC
CFIFO0 Extension Registers (
EQADC
_CF0ERw) (w=0, .., 3)
Table 25-29.
EQADC
CFIFOx Registers (
EQADC
_CFxRw) (w=0, .., 3) field description
Field Description
0-31
CFIFOx_DATAw
[0:31]
CFIFOx Data w (w = 0, .., 3)
Reading CFIFOx_DATAw returns the value stored on the wth entry of CFIFOx. Each CFIFO
is composed of four 32-bit entries, with register 0 being mapped to the one with the smallest
memory mapped address.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R CFIFO0_EDATAw
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R CFIFO0_EDATAw
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Register address:
EQADC
_BASE+0x110
Register address: EQADC _BASE+0x114
Register address:
EQADC
_BASE+0x118
Register address: EQADC _BASE+0x11C
Table 25-30. field description
Field Description
0-31
CFIFOx_EDATAw
[0:31]
CFIFOx Data w (w = 0, .., 3)
Reading CFIFOx_DATAw returns the value stored on the wth entry of CFIFOx. Each CFIFO
is composed of four 32-bit entries, with register 0 being mapped to the one with the smallest
memory mapped address.