NXP Semiconductors MPC5644A, Reference Manual, Page: 1264 / 1735

Deserial Serial Peripheral Interface (DSPI)
MPC5644A Microcontroller Reference Manual, Rev. 6
1264 Freescale Semiconductor
30.8.2.4 DSPI Clock and Transfer Attributes Registers 0–7
(DSPI_CTAR0–DSPI_CTAR7)
The DSPI_CTAR registers are used to define different transfer attributes. The number of CTAR registersis
parameterized in the RTL and can be from two to eight registers. Do not write to the DSPI_CTARregisters,
while the DSPI is in the Running state.
In master mode, the DSPI_CTAR0 - DSPI_CTAR7 registers define combinations of transfer attributessuch
as frame size, clock phase and polarity, data bit ordering, baud rate, and various delays. In slave mode,a
subset of the bitfields in the DSPI_CTAR0 and DSPI_CTAR1 registers are used to set the slave transfer
attributes.
When the DSPI is configured as a SPI master, the CTAS field in the command portion of the TX FIFOentry
selects which of the DSPI_CTAR register is used. When the DSPI is configured as a SPI bus slave,the
DSPI_CTAR0 register is used.
When the DSPI is configured as a DSI master, the DSICTAS field in the DSPI DSI Configuration Register
(DSPI_DSICR), selects which of the DSPI_CTAR register is used. When the DSPI is configured as a DSI
bus slave, the DSPI_CTAR1 register is used.
In CSI Configuration, the transfer attributes are selected based on whether the current frame is SPI data or
DSI data. SPI transfers in CSI Configuration follow the protocol described for SPI Configuration, and DSI
transfers in CSI Configuration follow the protocol described for DSI Configuration. CSI Configuration is
Address: DSP 0x8
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
TCNT
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-7. DSPI Transfer Count Register (DSPI_TCR)
Table 30-6. DSPI_TCR field description
Field Description
0–15
TCNT[0:15]
SPI Transfer Counter
The SPI_TCNT field counts the number of SPI transfers the DSPI makes. The
SPI_TCNT field increments every time the last bit of a SPI frame is transmitted. A value written to
SPI_TCNT presets the counter to that value. SPI_TCNT is reset to zero at the beginning of the frame
when the CTCNT field is set in the executing SPI command. The Transfer Counter ‘wraps around’ i.e.
incrementing the counter past 65535 resets the counter to zero.
16–31 Reserved, should be cleared.