NXP Semiconductors MPC5644A, Reference Manual, Page: 1563 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1563
The trigger bits FR_MBCCSRn[EDT] and FR_MBCCSRn[LCKT] and the interrupt enable bit
FR_MBCCSRn[MBIE] are not under access control and can be accessed from the application at any time.
The status bits FR_MBCCSRn[EDS] and FR_MBCCSRn[LCKS] are not under access control and can be
accessed from the CC at any time.
The interrupt flag FR_MBCCSRn[MBIF] is not under access control and can be accessed from the
application and the CC at any time. CC set access has higher priority.
The CC restricts its access to the regions depending on the current state of the message buffer. The
application must adhere to these restrictions in order to ensure data consistency. The receive message
buffer states are given in
Figure 33-138 . A description of the message buffer states is given in
Table 33-106 , which also provides the access scheme for the access regions.
The status bits FR_MBCCSRn[EDS] and FR_MBCCSRn[LCKS] provide the application with the
required status information. The internal status information is not visible to the application.
Figure 33-138. Receive message buffer states
Table 33-111. Receive message buffer states and access
State
FR_MBCCSRn Access from
Description
EDS LCKS Appl. Module
Idle 1 0 — SR Idle – Message Buffer is idle.
Included in message buffer search.
HDis 0 0 CFG — Disabled – Message Buffer under configuration.
Excluded from message buffer search.
HDisLck 0 1 CFG — Disabled and Locked – Message Buffer under configuration.
Excluded from message buffer search.
HLck 1 1 MSG — Locked – Applications access to data, control, and status.
Included in message buffer search.
CCBs 1 0 — — Buffer Subscribed – Message buffer subscribed for reception.
Filter matches next (slot, cycle, channel) tuple.
HDis
RESET_STATE
HD
HE
Idle
BS
SNS
SU
CCSu
CCBs CCRx
HLck HLckCCBs HLckCCRx
SSS
SLS
HE
HL
HDisLck
HD
HL
HU
BS
SNS
HL
HU
HU
HL
HU
SLS
SSS