NXP Semiconductors MPC5644A, Reference Manual, Page: 1459 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1459
33.5.2.5 System Memory Base Address Register (FR_SYMBADR)
NOTE
The system memory base address must be set before the CC is enabled.
The system memory base address registers define the base address of the FlexRay memory area within the
system memory. The base address is used by the BMIF to calculate the physical memory address for
system memory accesses.
1
0 0
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN not driven by CC
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by CC
0 1
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN driven by CC - connected to FlexRay channel A
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by CC
1 0
ports FR_A_RX, FR_A_TX, and FR_A_TX_EN driven by CC - connected to FlexRay channel B
ports FR_B_RX, FR_B_TX, and FR_A_TX_EN not driven by CC
1 1 Reserved
Base + 0x0004 Write: Disabled Mode
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
SMBA[31:16]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-4. System Memory Base Address High Register (FR_SYMBADHR)
Base + 0x0006 Write: Disabled Mode
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
SMBA[15:4]
0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-5. System Memory Base Address Low Register (FR_SYMBADLR)
Table 33-10. FR_SYMBADR field description
Field Description
SMBA System Memory Base Address — This is the value of the system memory base address for the
individual message buffers and sync frame table. This is the value of the system memory base address
for the receive FIFO if the FIFO address mode bit FR_MCR[FAM] is set to 1. It is defines as a byte
address.
Table 33-9. FlexRay channel selection (continued)
SCM CHB CHA Description