NXP Semiconductors MPC5644A, Reference Manual, Page: 1263 / 1735

Deserial Serial Peripheral Interface (DSPI)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1263
30.8.2.3 DSPI Transfer Count Register (DSPI_TCR)
The DSPI_TCR contains a counter that indicates the number of SPI transfers made. The transfer counter
is intended to assist in queue management. Do not write the DSPI_TCR, when the DSPI is in the Running
state.
Address: DSP 0x4 Access:
R DSI PISR 0 0 0 CTAR TXFR RXFR
W
Reset -
1
1
The reset bits in the DSPI_HCR are set by configuration parameters in the SOC.
- 0 0 0 - - - - - - - - - - -
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-6. DSPI Hardware Configuration Register (DSPI_HCR)
Table 30-5. DSPI_HCR field description
Field Description
DSI DSI features are implemented for the module.
0 - DSI features are not implemented, DSI registers don’t exist.
1 - DSI features are implemented
PISR PISR, PISR0-3 and parallel inputs frame positions selection logic are implemented for the module.
0 - DSPI_PISR0-3 registers are not implemented.
1 - DSPI_PISR0-3 registers are implemented
Reserved, should be cleared.
CTAR[]
CTAR, Maximum implemented DSPI_CTAR register number.
TXFR]
TXFR, Maximum implemented DSPI_TXFR register number.
RXFR]
RXFR, Maximum implemented DSPI_RXFR register number.
Reserved, should be cleared.