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Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
750
Freescale Semiconductor
24.2.1.1.2
eTPU timer channels
The eTPU engine has 32 independent channels, each corresponding to an Input/Output signal pair. The
channels time resolution is 24 bits, and are all identical.
Each channel consists of logic which supports two events and output controls. The event logic contains
two 24-bit capture registers, two 24-bit match registers, greater-equal and equal-only comparators.
Supporting two events enables many combinations of double-action functions (for example the channel
can handle two events with a single microcode service).
The channel configuration can be changed by the microengine on the fly. Each channel can perform double
capture, double match and other capture-match combinations. Channel modes available can do ordered or
unordered match. Some modes are also provided that can block one match by the occurrence of the other.
Service request can be generated on one or both of the match events.
Input signal can be separated from output signal in each channel. They can, optionally, be combined in a
single I/O pin driver. An output buffer enable signal, controlled by microcode, is provided for this case.
Digital filters are provided for the input signals, with distinct filtering modes available.
Each channel can use any time base or angle counter for either match or capture operation. For example,
a match on TCR1 can capture the value of TCR2. The channels can request service from the microengine
due to recognized pin transitions (input events) or timebase matches.
The eTPU channels also support the basic single-action operations found on TPU3 functionality with the
exception that time resolution is 24 bits.
Channel configuration combinations:
•
Single input capture, no match (TPU3 functionality).
•
Single input capture with single match timeout (TPU3 functionality).
•
Single input capture with double match timeout with several double match submodes.
•
Double input capture with single or double match timeout with several double match submodes.
•
Single output match (TPU3 functionality).
•
Double output match with several double match submodes.
•
Input-dependent output generation.
The double match functionality has various combinations for generation of service request and
determining pin actions. For more details refer to
Section 24.5.5, Enhanced Channels
.
In addition to the predefined channel configurations above, the user can also program its own channel
configuration, defining how input captures, matches and service-requests are related.
24.2.1.1.3
Host interface
The Host interface allows the Host CPU to control the operation of the eTPU. The Host CPU must
initialize the eTPU by writing to the appropriate Host interface registers to assign a Function and priority
to each channel. In addition, the Host writes to the Host Service Request and channel configuration
registers to further define Function operation for each initialized channel. Refer to
Summary of Contents for MPC5644A
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Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...