FlexCAN Module
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
1411
32.4.5.3
Free running timer (TIMER)
This register represents a 16-bit free running counter that can be read and written by the CPU. The timer
starts from 0x0000 after Reset, counts linearly to 0xFFFF, and wraps around.
The timer is clocked by the FlexCAN bit-clock (which defines the baud rate on the CAN bus). During a
message transmission/reception, it increments by one for each bit that is received or transmitted. When
there is no message on the bus, it counts using the previously programmed baud rate. During Freeze Mode,
the timer is not incremented.
The timer value is captured at the beginning of the identifier field of any frame on the CAN bus. This
captured value is written into the Time Stamp entry in a message buffer after a successful reception or
transmission of a message.
Writing to the timer is an indirect operation. The data is first written to an auxiliary register and then an
internal request/acknowledge procedure across clock domains is executed. All this is transparent to the
user, except for the fact that the data will take some time to be actually written to the register. If desired,
software can poll the register to discover when the data was actually written.
Figure 32-9. Free Running Timer (TIMER)
32.4.5.4
Rx Global Mask (RXGMASK)
This register is provided for legacy support and for MCUs that do not have the individual masking per
Message Buffer feature. For MCUs supporting individual masks per message buffer, setting
MCR[MBFEN] causes the RXGMASK Register to have no effect on the module operation. For MCUs not
supporting individual masks per message buffer, this register is always effective.
RXGMASK is used as acceptance mask for all Rx message buffers, excluding message buffers 14
–
15,
which have individual mask registers. When MCR[FEN] is set (FIFO enabled), the RXGMASK also
applies to all elements of the ID filter table, except elements 6–7, which have individual masks.
The contents of this register must be programmed while the module is in Freeze Mode, and must not be
modified when the module is transmitting or receiving frames.
1
One time quantum is equal to the Sclock period.
Base + 0x0008
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
TIMER
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Summary of Contents for MPC5644A
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Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...