NXP Semiconductors MPC5644A, Reference Manual, Page: 112 / 1735

Operating Modes and Clocking
MPC5644A Microcontroller Reference Manual, Rev. 6
112 Freescale Semiconductor
Figure 5-5. Normal Mode with Crystal Reference
5.3.4.4 Normal mode with external reference
The normal mode with external reference functions the same as normal mode with crystal reference,
except that the input clock reference to the FMPLL is driven by an external clock generator connected to
the EXTAL pin, rather than a crystal oscillator. The input frequency range is the same and frequency
modulation is available.
Figure 5-6. Normal Mode with External Reference
5.3.4.5 Software controlled power management
Software controlled power management and clock gating is supported on a peripheral by peripheral basis,
using a three tiered approach. The first tier is a clock gating feature implemented in some of the IP
0
1
0
1
XTAL OSC
FMPLL
XTAL
EXTAL
PLLREF
clkcfg[0]
SYSDIV
/2, /4, /8, /16
bypass_sysdiv
siu_system_div[1:0]
IDF PD ODF
NDIV Lock
Control & Status Registers
PHI
CLKIN
Clock Quality Monitor
(CQM)
loss of
VCO
loss of
Reference
system
clock
RCOSC
0
1
0
1
XTAL OSC
FMPLL
XTAL
EXTAL
PLLREF
clkcfg[0]
SYSDIV
/2, /4, /8, /16
bypass_sysdiv
siu_system_div[1:0]
IDF
PD
ODF NDIV Lock
Control & Status Registers
PHI
CLKIN
Clock Quality Monitor
(CQM)
loss of
VCO
loss of
Reference
system
clock
RCOSC