NXP Semiconductors MPC5644A, Reference Manual, Page: 948 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
948 Freescale Semiconductor
24.5.9.3.5 Write Channel Match and UDCM Registers
Match registers can have their values changed using ERWA and ERWB fields (1 bit each). They also set
their respective MRLE register (see
Section 24.5.5.2, Match Recognition ).
ERWA can also be used to program the UDCM register (see Section , UDCM – User Defined Channel
Mode ). The field CMW selects where the contents of ERTA is copied when ERWA is active (see
Table 24-102 ).
If ERTA or ERTB is a destination of an ALU operation and, at the same time, the respective ERWA/B field
is active, the new ERTA value is the one written into the MatchA/B register or the UDCM register.
24.5.9.3.6 Clear transition/match event registers
Flags MRLA, MRLB, TDLA and TDLB (see Section 24.5.5.1.1, ER – Event Registers ) indicate the state
of matches and transitions detected in the selected channel, and it is possible to clear those flags using the
microcode fields MRLA, MRLB (1 bit each) and TDL (1 or 2 bits, depending on the format). The flags
cleared by these microcode fields are the actual channel flags, and also the ones sampled into the branch
logic.
Table 24-101. Immediate Pin State Control – PSC and PSCS
PSC PSCS Meaning
00 0 Set signal as specified by OPACA (see Section 24.5.9.3.3, Transition detection and pin action
control )
00 1 Set signal as specified by OPACB (see Section 24.5.9.3.3, Transition detection and pin action
control )
01 x Set signal high
10 x Set signal low
11 x Don’t change signal state
Table 24-102. Write MatchA/B – ERWA/B
Field CMW Value Action
ERWA 1 0 write ERTA value in MatchA. Enable matches for MatchA register (MRLEA = 1)
0 0 write ERTA value into UDCM
1 1 don’t change UDCM, MatchA and MRLEA
0 1 reserved
ERWB 1 0 write ERTB value in MatchB. Enable matches for MatchB register (set MRLEB = 1)
1 1 don’t change MatchB and MRLEB
0
0 0 reserved