NXP Semiconductors MPC5644A, Reference Manual, Page: 1189 / 1735

Decimation Filter
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1189
18–19
SZROSEL[1:0]
1
Integrator Zero Control Mode Selection
The SZROSEL field defines the use of the integrator zero hardware input signal, according to
Table 26-13 . For more details see Section 26.5.15.3, Integrator reset ”.
20–21 Reserved, should be cleared.
22–23
SHLTSEL[1:0]
2
Integrator Halt Control Selection. The SHLTSEL field defines the integrator halting mechanism,
according to
Table 26-14 . When the integrator is halted, the integration accumulator remains
unaltered on filter outputs independently of the enabling selected by SENSEL. For more details
see
Section 26.5.15.4, Integrator enabling and halting ”
24 Reserved, should be cleared.
Table 26-12. DECFILTER_MXCR Register Field Descriptions (continued)
Field Description
Table 26-13. SZROSEL – Integrator Zero mode
SZROSEL[1:0] Description
00 Hardware integrator zero request disabled
01 Integrator zero on toggle of hardware signal
10 Integrator zero on rising edge of hardware signal
11 Integrator zero on falling edge of hardware signal
.
Table 26-14. SHLTSEL – Integrator halt control selection
SHLTSEL[1:0] Description
00 Hardware halt control signal disabled
01 Integrator halted, independently of the hardware signal
10 Integrator halted when signal is at logical 0
11 Integrator halted when signal is at logical 1