NXP Semiconductors MPC5644A, Reference Manual, Page: 878 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
878 Freescale Semiconductor
action is not sensitive to microcode latency (ME bit asserted). Example for usage is PWM interlaced
function on which the latency is determined by the period and not the duty cycle.
Another possibility is using one match for pin actions and the other match for an unrelated timed task
without pin action (double the functionality of a single channel).
Match B Request Modes (m2_st, m2_dt)
On an output signal, these modes can generate narrow pulses or do conditional pin actions. A conditional
pin action means that the pin state is changed only if the match recognitions occurred in the correct order,
since the Match B recognition which generates the service request also has priority over the pin action and
blocks future Match A recognitions.
Setting OPACA to a desired pin action and OPACB to no-action, and using different time bases for Match
A and Match B defines a conditional OPACA pin action which can be blocked by Match B recognition.
For example, setting Match A on time and Match B on angle can limit the pin action to a maximum angle
value.
When pulses are generated, the service is requested at the trailing edge of the pulse, after MRLB is
asserted.
Both Match Request Modes (bm_st, bm_dt)
On an output signal, each match recognition can affect the pin state, and capture its programmed time base.
This way the pin action can be programmed separately for both match recognitions. For example, both
match recognitions can negate the signal, and service request is generated after both conditions are met.
This mechanism can set two conditions to do a required pin action, and the first recognition changes the
signal, but service is called only after both conditions occur.
When using the same time base, these modes can generate narrow pulses in any required order. For
example, in a PWM function, when duty cycle is below 50% the function can get service on the low time
and program the pulse to the required duty cycle of the high time. When duty cycle is equal or above 50%,
the function can get service on the high time and program a negative pulse with the width of the required
low time. To switch between the two states the function can program once the same transition time to
MatchA and Match B with a required pin action, and on the next service program double match for the
new state.
Another usage is generating a required pin action on one programmed time and service request later on
another time, after the second match recognition occurs, or capturing some timebase on one time and
generating a required signal transition and service request later.
Ordered Modes with Match B Request (m2_o_st, m2_o_dt)
The order of the match recognitions imply that OPACA register programmed pin action always precede
the OPACB register pin action. Setting OPACA to no-action, based on the greater-equal comparator,
enables using Match A on one time base to delay the signal effect of Match B on the other time base. This
method implements a conditional pulse extension or conditional delay on signal transition.
These modes can also be used for deferred pulse generation with microcode service request after its trailing
edge (if Match A condition comes after Match B condition). Another option is having Match A recognition