NXP Semiconductors MPC5644A, Reference Manual, Page: 1521 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1521
33.5.2.69.30 Protocol Configuration Register 29 (FR_PCR29)
33.5.2.69.31 Protocol Configuration Register 30 (FR_PCR30)
33.5.2.70 ECC Error Interrupt Flag and Enable Register (FR_EEIFER)
This register provides the means to control the ECC related interrupt request lines and provides the
corresponding interrupt flags. The interrupt flags are cleared by writing 1, which resets the corresponding
report registers. For a detailed description see
Section 33.6.24.2, Memory error reporting ”.
Base + 0x00DA Write: POC:config
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
extern_offset_
correction
minislots_max
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-99. Protocol Configuration Register 29 (FR_PCR29)
Base + 0x00DC Write: POC:config
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0
sync_node_max
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-100. Protocol Configuration Register 30 (FR_PCR30)
Base + 0x00F0 Write: Normal Mode
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
L
RNE_OF
L
RCE_OF
DRNE_OF DRCE_OF
LRNE_IF LRCE_IF
DR
NE_IF
DR
CE_IF
0 0 0 0
LRNE_
IE
LRCE_
IE
D
RNE_IE
D
RCE_IE
W w1c w1c w1c w1c w1c w1c w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 33-101. ECC Error Interrupt Flag and Enable Register (FR_EEIFER)