NXP Semiconductors MPC5644A, Reference Manual, Page: 858 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
858 Freescale Semiconductor
set of MRLE. In this case, both MRL and MRLE will be set, and a match service request will occur if
enabled. However, the match happened on the old match value, not on the new (reprogrammed) one. In
order to prevent this ambiguity to the code that services the match, it is advisable to clear the MRLE
(besides MRL) together with the match reprogramming, avoiding the match on the old value to occur while
the new match value is being written. The set of the MRLE due to match reprogramming prevails over the
MRLE clear, thus allowing the new programmed match to occur.
24.5.5.3 Transition Detection and Time Base Capture
Time Base Capture(s) occur when the value of a specified TCR is sampled into the CaptureA and/or
CaptureB register. TBSA[1] and TBSB[1] select which TCR will be captured in CaptureA and CaptureB,
respectively.
A capture event may occur due to either of the following events:
• The assertion condition of Match Recognition Latch (MRL), even if MRL is simultaneously
negated by microcode
• The assertion condition of Transition Detection Latch (TDL), even if TDL is simultaneously
negated by microcode.
• Any Transition Event specified by IPACA if both the Transition Detection Latch TDLA and
Transition Continuous Capture Enable TCCEA are asserted.
A capture event occurs together with the assertion of MRL or TDL either on T2 or T4 positive edges, and
captures the time-base value that caused the match, even if TCR1/2 increments concurrently with the
assertion (see
Section 24.7.1, Microcycle and I/O timing )
1
. MRLA/B and TDLA may, depending on the
channel mode, inhibit the capture of the second event’s TCR into CaptureA/B. As a general rule, values
captured by signal transitions are not overwritten by values captured by match events.
When the enable bit TCCEA is asserted, captures due to Transition Events also occur after TDLA is
asserted. Those captures happen on transition events specified by IPACA, and the TCR value is saved into
CaptureA register only.
The capturing scheme is defined by the Channel Mode programmed at register PDCM, or at register
UDCM when User Defined Channel Mode is selected. For more information on mode-dependent capture
schemes refer to
Section 24.5.5.4, Channel Modes .
24.5.5.3.1 TDLA/B – Transition Detect Latches
TDLA/B indicate detection of specific transition occurrences on a channel input signal. TDLA and TDLB
assertion causes service request in single and double transition predefined modes, respectively. TDLB
assertion does not cause Service Request in single transition predefined modes, and TDLA assertion does
not cause Service request in double transition predefined modes. In single transition channel predefined
modes TDLB can be asserted on the second transition, but does not generate Service Request. Yet on
predefined modes, TDLB assertion is enabled only if TDLA is asserted to detect an ordered input signal
double transition. All the restrictions above, however, may be overridden by using the User Defined
Channel Mode. The IPACA and IPACB registers indicate the programmed edges of the first and second
detected transition, respectively.
1. In TPU3, when TCR1 was counting at maximum rate of system clock divided by 2, the next value was captured.