NXP Semiconductors MPC5644A, Reference Manual, Page: 1514 / 1735

FlexRay Communication Controller (FlexRay)
MPC5644A Microcontroller Reference Manual, Rev. 6
1514 Freescale Semiconductor
comp_accepted_startup_range_b pdAcceptedStartupRange -
pDelayCompensation[B]

T 26
listen_timeout pdListenTimeout - 1

T 14/15
key_slot_id pKeySlotId number 18
key_slot_used_for_startup pKeySlotUsedForStartup bool 11
key_slot_used_for_sync pKeySlotUsedForSync bool 11
latest_tx gNumberOfMinislots - pLatestTx minislot 21
sync_node_max gSyncNodeMax number 30
micro_initial_offset_a pMicroInitialOffset[A]

T 20
micro_initial_offset_b pMicroInitialOffset[B]

T 20
micro_per_cycle pMicroPerCycle

T 22/23
micro_per_cycle_min pMicroPerCycle - pdMaxDrift

T 24/25
micro_per_cycle_max pMicroPe pdMaxDrift

T 26/27
micro_per_macro_nom_half round( pMicroPerMacroNom / 2)

T 7
offset_correction_out pOffsetCorrectionOut

T 9
rate_correction_out pRateCorrectionOut

T 14
single_slot_enabled pSingleSlotEnabled bool 10
wakeup_channel pWakeupChannel see Table 33-79 10
wakeup_pattern pWakeupPattern number 18
decoding_correction_a pDecodingCorrection +
pDelayCompensation[A] + 2

T 19
decoding_correction_b pDecodingCorrection +
pDelayCompensation[B] + 2

T 7
key_slot_header_crc header CRC for key slot 0x000 0x7FF number 12
extern_offset_correction pExternOffsetCorrection

T 29
extern_rate_correction pExternRateCorrection

T 21
1
See FlexRay Communications System Protocol Specification, Version 2.1 Rev A for detailed protocol parameter definitions
Table 33-79. Wakeup channel selection
wakeup_channel Wakeup channel
0 A
1 B
Table 33-78. Protocol configuration register fields (Sheet 1 of 2)
Name Description
1
Min Max Unit FR_PCR