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MPC5644A Microcontroller Reference Manual, Rev. 6
926
Freescale Semiconductor
(unsigned) MACH|MACL = (unsigned) AS * (unsigned) BS
MC and MV flags are reset. MZ is set if result is 0, resets otherwise. MN is a copy of the most significant
bit of result.
24.5.8.3.5
Signed multiply-accumulate (macs)
MDU signed multiply-accumulate is defined as follows:
(signed/unsigned) {MACH,MACL} += (signed) AS * (signed) BS
MC is not altered.
MV is set if result can not be represented by a 48-bit signed number. MACS never resets MV flag: it is left
as is if no overflow occurs, or set it otherwise. This allows checking the overflow flag only once at the end
of a series of multiply-accumulate operations in a scalar product calculation.
if (({MACH,MACL} += AS * BS < -2
47)
|| ({MACH,MACL} += AS * BS > 2
47
- 1))
MV = 1
MZ is set if result is 0, resets otherwise. MN is a copy of the most significant bit of result.
Note that only 24-bit multiply-accumulate is available.
24.5.8.3.6
Unsigned multiply-accumulate (macu)
MDU Unsigned Multiply-Accumulate is defined as follows:
(signed/unsigned) {MACH,MACL} += (unsigned) AS * (unsigned) BS
MC is set if result can not be represented by a 48-bit unsigned non-negative number. MACU never resets
MC flag: MC flag is left as is if no carry occurs, or set otherwise. This allows checking the carry flag only
once at the end of a series of multiply-accumulate operations in a scalar product calculation.
if (({MACH,MACL} += AS * BS < 0) || ({MACH,MACL} += AS * BS > 2
48
- 1))
MC = 1
MV is not altered.
MZ is set if result is 0, resets otherwise. MN is a copy of the most significant bit of result.
Note that only 24-bit multiply-accumulate is available.
24.5.8.3.7
Signed fractional multiplication (fmults)
MDU Signed Fractional Multiplication takes the B-Source as an
unsigned
8- or 16-bit fraction between 0
and (2
8
- 1)/2
8
(inclusive) for the 8-bit operation, or between 0 and (2
16
-1)/2
16
(inclusive) for the 16-bit
operation. Only A-Source is taken as a signed number. The value of B-Source is considered the unsigned
numerator of a fraction with denominator 2
8
or 2
16
for the 8- and 16-bit operations, respectively.
The integer part of the result is stored in MACH, and the fractional part in MACL. The result is signed, so
that the concatenation of MACH and MACL form a 48-bit fixed point number with a 24-bit mantissa, both
for 8- and 16-bit operations. To calculate the unsigned numerator of the fractional part (with denominator
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...