NXP Semiconductors MPC5644A, Reference Manual, Page: 506 / 1735

System Integration Unit (SIU)
MPC5644A Microcontroller Reference Manual, Rev. 6
506 Freescale Semiconductor
16.6.15.138Pad Configuration Register 219 (SIU_PCR219)
NOTE
The SIU_PCR219 register is unusual in that it controls pads for two separate
device pins: GPIO[219] and MCKO. Please carefully note the pin(s)
affected by the bits in this register.
Figure 16-171. Pad Configuration Register (SIU_PCR219)
Table 16-173. SIU_PCR218 PA values
Signal Name Module Description I/O
1,2
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using the IBE and OBE
bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching between input and
output is handled internally and the IBE and OBE bits are ignored.
PA value
Primary AN[15] eQADC Analog input I 0b001
ALT1 FCK eQADC Free-running clock O 0b010
ALT2 ETPU_A[29] eTPU eTPU channel O 0b100
S0x1F6
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0 0 0 0 0 0 OBE
1
1
When configured as GPO, the OBE bit should be set to 1.
IBE
2
2
When configured as GPO, the IBE bit may be set to one to reflect the pin state in the corresponding GPDI register.
When configured as GPI, the IBE bit should be set to one.
DSC[1:0] ODE HYS SRC[1:0] WPE WPS
W
Reset
0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1
= Unimplemented or Reserved
Table 16-174. SIU_PCR219 field descriptions
Field Description
0–5 Reserved
6
OBE
1
Output buffer enable
Enables the pad as an output and drives the output buffer enable signal.
0 Disable output buffer for the pad.
1 Enable output buffer for the pad is enabled.
Note: This field affects only the GPIO[219] pin.