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External Bus Interface (EBI)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
329
14.5.2.11.1
Misaligned access support (64 bit AMBA)
shows all the misaligned access cases supported by the EBI (using a 64-bit AMBA
implementation), as seen on the internal master AMBA bus. All other misaligned cases are not supported.
If an unsupported misaligned access to the EBI is attempted (such as non-chip-select or burst misaligned
access), the EBI errors the access on the internal bus and does not start the access (nor assert TEA)
externally.
shows which external transfers are generated by the EBI for the misaligned access cases in
, for each port size.
Table 14-19. Misalignment Cases Supported by a 64 bit AMBA EBI (internal bus)
No.
1
1
Misaligned case number. Only transfers where HUNALIGN=1 are numbered as misaligned cases.
Program Size and
byte offset
Address
[29:31]
2
2
Address on internal master AHB bus, not necessarily address on external ADDR pins.
Data Bus Byte Strobes
3
3
Internal byte strobe signals on AHB bus. Shown with Big-Endian byte ordering in this table, even though
internal master AHB bus uses Little-Endian byte-ordering (EBI flips order internally).
HSIZE
4
4
Internal signal on AHB bus; 00=8-bits, 01=16 bits, 10=32 bits, 11=64-bits. HSIZE is driven according to the
smallest aligned container that contains all the requested bytes. This results in extra EBI external transfers in
some cases.
HUNALIGN
5
5
Internal signal on AHB bus that indicates that this transfer is misaligned (when 1).
1
Half @0x1,0x9
001
0110_0000
10
1
2
Half @0x3,0xB
011
0001_1000
11
1
3
Half @0x5,0xD
101
0000_0110
10
1
4
-
Half @0x7, 0xF
(2 AHB transfers)
111
000
0000_0001
1000_0000
01
6
00
6
For this case, the EBI internally treats HSIZE as 00 (1-byte access).
1
0
5
Word @0x1,0x9
001
0111_1000
11
1
6
Word @0x2,0xA
010
0011_1100
11
1
7
Word @0x3,0xB
011
0001_1110
11
1
8
-
Word @0x5,0xD
(2 AHB transfers)
101
000
0000_0111
1000_0000
10
00
1
0
9
-
Word @0x6, 0xE
(2 AHB transfers)
110
000
0000_0011
1100_0000
10
7
01
7
For this case, the EBI internally treats HSIZE as 01 (2-byte access).
1
0
10
11
Word @0x7,0xF
(2 AHB transfers)
111
000
0000_0001
1110_0000
10
1
1
12
-
Doubleword
@0x4,0x8
(2 AHB transfers)
100
000
0000_1111
1111_0000
11
8
10
8
For this case, the EBI internally treats HSIZE as 10 (4-byte access).
1
0
13
-
Doubleword
@0x2,0xA
(2 AHB transfers)
010
000
0011_1111
1100_0000
11
01
1
0
14
15
Doubleword
0x6,0xE
(2 AHB transfers)
110
000
0000_0011
1111_1100
11
11
1
1
Summary of Contents for MPC5644A
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Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
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