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System Integration Unit (SIU)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
475
16.6.15.89 Pad Configuration Register 136 (SIU_PCR136)
Figure 16-122. Pad Configuration Register (SIU_PCR136)
16.6.15.90 Pad Configuration Register 137 (SIU_PCR137)
Figure 16-123. Pad Configuration Register (SIU_PCR137)
S0x150
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
PA
OBE
1
1
When configured as IRQ, the OBE bit has no effect. The OBE bit must be set to one for both ETPU_A[22] and
GPIO[136] when configured as outputs.
IBE
2
2
When configured as ETPU_A[17], IRQ or GPO, the IBE bit may be set to one to reflect the pin state in the
corresponding GPDI register. Setting the IBE bit to zero reduces power consumption. The IBE bit must be set to
one for both ETPU_A[22] and GPIO[136] when configured as inputs.
0
0
ODE
HYS
SRC
WPE
WPS
3
3
The weak pull up/down selection at reset for the ETPU_A[22] pin is determined by the WKPCFG pin.
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
WKP
= Unimplemented or Reserved
Table 16-125. SIU_PCR136 PA values
Signal
Name
Module
Description
I/O
1,2
1
In cases where an I/O function can be either an input or an output, I/O direction is specified using the IBE and OBE
bits. Set IBE = 1 for input or OBE = 1 for output.
2
For I/O functions that change direction dynamically, such as the external data bus, switching between input and
output is handled internally and the IBE and OBE bits are ignored.
PA value
Primary
ETPU_A[22]
eTPU
eTPU channel
I/O
0b001
ALT1
IRQ[10]
SIU
External interrupt
I
0b010
ALT2
ETPU_A[17]
eTPU
eTPU channel
O
0b100
GPIO
GPIO[136]
SIU
GPIO
I/O
0b000
S0x152
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
PA
OBE
1
1
When configured as IRQ, the OBE bit has no effect. The OBE bit must be set to one for both ETPU_A[23] and
GPIO[137] when configured as outputs.
IBE
2
2
When configured as ETPU_A[21], FR_A_TX_EN, IRQ or GPO, the IBE bit may be set to one to reflect the pin state
in the corresponding GPDI register. Setting the IBE bit to zero reduces power consumption. The IBE bit must be
set to one for both ETPU_A[23] and GPIO[137] when configured as inputs.
0
0
ODE
HYS
SRC
WPE
WPS
3
3
The weak pull up/down selection at reset for the ETPU_A[23] pin is determined by the WKPCFG pin.
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
WKP
= Unimplemented or Reserved
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...