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Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor
1169
.
The EQADC and QADC also have similar procedures for the configuration or execution of applications.
shows the steps required for the QADC versus the steps required for the EQADC system.
Table 25-78. Terminology Comparison between QADC and
EQADC
QADC Terminology
EQADC
Terminology
Function
CCW
Command Message
In the QADC, the hardware only executes conversion command
words.
In the EQADC, not all commands are conversion commands; some
are configuration commands.
Queue Trigger
CFIFO Trigger
In the QADC, a trigger event is required to start the execution of a
queue.
In the EQADC, a trigger event is required to start command
transfers from a CFIFO. When a CFIFO is TRIGGERED and
transferring, commands are continuously moved from CQueues to
CFIFOs. Thus, the trigger event initiates the “execution of a queue”
indirectly.
Current Word Pointer
Queue x (CWPQx)
Counter Value of
Commands
Transferred from
Command FIFOx
(TC_CFx)
In the QADC, CWPQx allows the last executed command on queue
x to be determined.
In the EQADC, the TC_CFx value allows the last transferred
command on CQueue x to be determined.
Queue Pause Bit (P)
CFIFO Pause Bit
In the QADC, detecting a pause bit in the CCW will pause the queue
execution.
In the EQADC, detecting a pause bit in the Command will pause
command transfers from a CFIFO.
Queue Operation
Mode (MQx)
CFIFO Operation
Mode (MODEx)
The EQADC supports all queue operation modes in the QADC
except operation modes related to a periodic timer. A timer
elsewhere in the system can provide the same functionality if it is
connected to ETRIGx.
Queue Status (QS)
CFIFO Status (CFSx) In the QADC, the Queue Status is read to check whether a queue
is idle, active, paused, suspended, or trigger pending.
In the EQADC, the CFIFO Status is read to check whether a queue
is IDLE, WAITING FOR TRIGGER (idle or paused in QADC), or
TRIGGERED (suspended or trigger pending in QADC). What
CFIFO is currently “active” can be determined by reading the
LCFTCBz field on the EQADC_CFSSR registers.
Table 25-79. Usage Comparison between QADC and
EQADC
System
Procedure
QADC
EQADC
System
Analog Control Configuration
Configure analog device by writing to
the QADC registers.
Program configuration commands into
command queues.
Prepare Scan Sequence
Program scan commands into
command queues.
Program scan commands into
command queues.
Queue Control Configuration
Write to the QADC Control Registers.
Write to the EQADC Control Registers.
Data Transferred between
Queues and Buffers
Not Required.
Program the DMAC or the CPU to
handle the data transfer.
Serial Interface Configuration
Not Required.
Write to the EQADC SSI Registers.
Summary of Contents for MPC5644A
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Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
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Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...