NXP Semiconductors MPC5644A, Reference Manual, Page: 1081 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1081
Read Configuration Command Format for On-Chip ADC Operation
Figure 25-53 describes the command message format for a read configuration command when interfacing
with the on-chip ADCs. A read configuration command is used to read the contents of the on-chip ADC
registers which are only accessible via command messages. Read configuration commands are
differentiated from write configuration commands by an asserted R/W bit.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
EOQ
PAU
SE
REP
RESERVE
D
EB
(0b0)
BN
R/W
(0b0)
ADC_REGISTER HIGH BYTE
CFIFO Header ADC Command
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
ADC_REGISTER LOW BYTE ADC_REG_ADDRESS
ADC Command
Figure 25-52. Write Configuration Command Format for On-Chip ADC Operation
Table 25-55. Write Configuration Command Format for On-Chip ADC Operation field description
Field Description
0
EOQ
End Of Queue Bit
1
PAUSE
Pause Bit
2
REP
Repeat/loop Start Point Indication Bit
5
EB
External Buffer Bit
6
BN
Buffer Number Bit
Refer to
Section , Conversion Command Format for the Standard Configuration.
7
R/W
Read/Write bit
A negated R/W indicates a write configuration command.
Write
8-11
ADC_REGISTER_HIGH_BYTE
[0:7]
ADC Register High Byte Field
REGISTER_HIGH_BYTE is the value to be written into the most significant 8 bits
of control/configuration register when the R/W bit is negated.
16-23
ADC_REGISTER_LOW_BYTE
[0:7]
Register Low Byte Field
REGISTER_LOW_BYTE is the value to be written into the least significant 8 bits
of a control/configuration register when the R/W bit is negated.
24-31
ADC_REG_ADDRESS
[0:7]
ADC Register Address
The ADC_REG_ADDRESS field selects a register on the ADC register set to be
written or read. Only half-word addresses can be used.