NXP Semiconductors MPC5644A, Reference Manual, Page: 1005 / 1735

Enhanced Queued Analog-to-Digital Converter (EQADC)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 1005
• Two independent on-chip RSD Cyclic ADCs
— 8, 10, and 12 bits AD Resolution
— Targets up to 10 bit accuracy at 500KSample/s (ADC_CLK=7.5 MHz) and 8 bit accuracy at
1M Sample/s (ADC_CLK=15 MHz) for differential conversions
— Selectable common mode conversion range (0 - 5V; 0 - 2.5V; 0 - 1.25V)
— Differential conversions
— Differential channels include variable gain amplifier for improved dynamic range (x1; x2; x4)
— Differential channels include programmable pull-up and pull-down resistors for biasing and
sensor diagnostics (200k ohms; 100k ohms; 5k ohms)
— Sample times of 2 (default), 8, 64 or 128 ADC clock cycles
— Provides time stamp information when requested
— Parallel interface to EQADC CFIFOs and RFIFOs
— Supports both right-justified unsigned and signed formats for conversion results
— The REFBYPC pin stabilizes one of internal generated reference
— Temperature sensor
— Ability to measure directly Vdd
• Automatic application of ADC calibration constants
— Provision of reference voltages (25%VREF and 75%VREF) for ADC calibration purposes
• 40 input channels available to the two on-chip ADCs
• 4 pairs of differential analog input channels
• Full duplex synchronous serial interface to an external device
— Has a free-running clock for use by the external device
— Supports a 26-bit message length
— Transmits a null message when there are no triggered CFIFOs with commands bound for
external CBuffers, or when there are triggered CFIFOs with commands bound for external
CBuffers but the external CBuffers are full
• Parallel Side Interface to communicate with several on-chip companion modules
• STAC bus Client Interface to import an alternative timebase to the internal time stamp
• Priority Based CFIFOs
— Supports six CFIFOs with fixed priority. The lower the CFIFO number, the higher its priority.
When commands of distinct CFIFOs are bound for the same CBuffer, the higher priority
CFIFO is always served first.
— Immediate conversion command feature with conversion abort control
— Streaming mode operation of CFIFO0 to execute some commands several times
— Supports software and several hardware trigger modes to arm a particular CFIFO
— Generates interrupt when command coherency is not achieved
• External Hardware Triggers
— Supports rising edge, falling edge, high level and low level triggers